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NXP Semiconductors /MIMXRT1052 /GPIO1 /DR_SET

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Interpret as DR_SET

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https://regviz.com/r/NXP Semiconductors/MIMXRT1052/GPIO1/DR_SET#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0DR_SET

Description

GPIO data register SET

Fields

DR_SET

DR_SET

Links

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Register License

Copyright 2016-2019 NXP All rights reserved.

SPDX-License-Identifier: BSD-3-Clause

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data